Documents / Official release
This Defense Intelligence Reference Document, dated 10 December 2010, was prepared by the Defense Intelligence Agency's Defense Warning Office under the Advanced Aerospace Weapon System Applications program. It examines quantum computing and DNA-based molecular computing as options for onboard supercomputing in future spaceflight. It forecasts working ion trap quantum computers within 10 years, simple DNA tile computing within 20 years, and self-repairing DNA computers and hybrid quantum dot systems on a 40-year horizon.
From the source: Release of 2026-09-18 Incident: 12/10/10, Las Vegas, Nevada. Released with redactions. This document is a Defense Intelligence Reference Document (DIRD), a technical reference format used by the Defense Intelligence Agency (DIA) to capture baseline knowledge on a specific topic for later analytic use. DIRDs are best understood as reference and synthesis products rather than as original research. It is one of 38 DIRDs produced under the Advanced Aerospace Weapon System Applications Program (AAWSAP) between 2009 and 2011. Because AAWSAP’s scope permitted a broad range of supporting topics, not every DIRD in the series directly concerns aerospace systems or future threat assessment. The following summary reflects the DIRD’s scope and framing at the time of writing and should not be read as implying current validation of the concepts discussed. This DIRD surveys advanced computing concepts for future space and automation applications, focusing on quantum and molecular (DNA-based) computing as potential alternatives to conventional silicon electronics. The report introduces quantum computing principles alongside DNA-based logic gates, self-assembly, and nanoscale repair mechanisms, arguing that these unconventional architectures might eventually offer advantages in radiation tolerance, physical robustness, and specialized onboard processing for space-based platforms. It notes that near-term practical barriers remain substantial. Quantum systems continue to depend on complex cryogenics, shielding, and unsolved reliability challenges, while DNA-based computing remains a far-future concept rather than a viable alternative to general-purpose processors. Overall, the document presents both frameworks as long-term possibilities to complement, rather than immediately replace proven space-qualified electronics. It concludes that the stronger, nearer-term cases for such architectures are in highly specialized or hybrid roles rather than in fully mature general-purpose onboard computing applications.
UNCLASSIFIED//POR: OPPICIAL USE OIILI
The first challenge to overcome in supercomputing in space is radiation causing temporary
and permanent errors in calculation. The current approach is to make the solid state
components radiation-hard, a time-consuming and costly process. An alternate approach is
to use multiple commercial-off-the-shelf (COTS) components in parallel architecture.
George's group at the University of Florida pursued this approach with earthbound success. (2,
3) A good question arises that if 50 years of space travel hasn't required one onboard
supercomputer, why start now? It seems NASA asked this question as well and, after years
of preparation, cancelled the space test of the technology in late 2009.
Regardless of the need for current missions, one can imagine many future applications where
it would be more convenient to data process on long space missions without downloading
data to Earth-based system and uploading the results. This is especially true for long
duration spaceflight where communication delays could be minutes to hours (Mars ~13
minutes, Jupiter ~45 minutes, and Neptune ~4 hours). Spacecraft active in the 40-year
horizon will require supercomputing technology on-board to process all of the data to be
acquired during flight. This includes astronomical data as well as ship and crew data. c
Example missions include Mars with a goal to analyze the planet using thousands of semi
autonomous sensors or millions of independent, wirelessly communicating nanomachines
("magic dust"). In such scenarios, it is not necessarily numbers that need lots of crunching,
but algorithms that need to be run on powerful systems that could be non -traditional in their
design; for example, massively parallel.
MAKING DIGITAL CIRCUITS FASTER
In consideration of the underlying physics in the electrodynamics of transistor operation, the
scale of the constituent elements dominates the type of analyses required. In the
macroscopic regime, constituents are measured in microns or larger, properties are
dominated by well-defined statistical averages in bulk matter, and non-classical effects due
to the underlying fact that all particles involved in the interactions are really fluctuations
within a relativistic quantum field can safely be ignored. For 40 years making a fast transistor
was primarily accomplished by avoiding saturation between states in an arrangement known
as emitter coupled logic (ECL, pronounced "ek-el"). The ECL family of logic circuits could
achieve sub-nanosecond switching times and dominated the leading-edge of high-speed
computing up until the early 1990s. The drawback of ECL was that without reaching
saturation, no depletion zone existed within the individual transistors and thus current flowed
through much of the device hardware instead of the usual small leakage current associated
with gates in a defined state. ECL's large current flow makes cooling and power requirements
challenging, especially for space-based platforms where heat dissipation is an issue.
Saturation technologies, primarily MOSFET-based, surpassed the speed of high-current
devices when the footprint of individual elements became small enough that a change
between depletion states could be quickly stabilized, given the comparably slow drift
velocities of primary charge carriers. These CMOS-family technology devices are the current
state-of-the-art in integrated circuits, and device speed increases, until recently, were
dominated by making the circuit elements smaller (see below). Intel produces high volume
!Cs with circuit elements size at 32 nm, and has demonstrated memory elements in 22 nm
c The scenario of several massive data acqu isition channels was presented at the Workshop for Technology Brea kthroughs
fo r Human Space Exploration , June 17th 2010, NASA Headquarters, Washington DC . Navigation is and will continue to be
handled by traditional computing mach ines - it is only rocket science that needs to be solved for navigation purposes.
UNCLASSIFIED/ /FOA OFFICil.t.k W&E 8HL1/
8 Not linked to a story yet.
Official release, from the pursue collection. The PDF is mirrored here; the original link is above. 54 pages are in the text index: search them above, or from the library's search.